Memory supercycle: A structural shift rewriting supply and demand paradigm

• High Bandwidth Memory (HBM) has become a critical component in high-end AI chips, transforming memory from a commoditised product into a strategic asset.

• HBM expansion is crowding out traditional DRAM supply, while disciplined capacity growth creates a rare “dual supply tightness.”

• With the HBM4 competitive landscape still evolving, investors are better positioned gaining diversified exposure to the memory and semiconductor sector, such as through the  Global X Asia Semiconductor ETF (HKEX:3119), rather than betting on individual stocks. The ETF offers an estimated upside of approximately 82% by FY2028.

An Unprecedented Rally

As early as 2024, in our article “AI Stimulates HBM Demand: Previewing the South Korean Equity Market in 2024,” we identified High Bandwidth Memory (HBM) as a key emerging theme in the semiconductor industry. Since then, HBM-related stocks have rallied significantly, validating our early conviction.

Over the past year, SK Hynix’s share price has risen nearly 400%, while Micron has more than tripled from its lows. Samsung Electronics briefly reached a historical high this year, reflecting continued investor enthusiasm for the AI-driven demand for memory.

Behind this remarkable rally lies what may be the strongest memory cycle in modern semiconductor history — one driven not by consumer electronics, but by the global build-out of artificial intelligence infrastructure.

Investors may ask: has the investment opportunity already passed, or is the supercycle still in its early stages?

The cruel history of memory: Cycles, consolidation, and commoditisation

DRAM (Dynamic Random Access Memory) was commercialised in the early 1970s. Over the following decades, memory density roughly doubled every 18 months. As unit costs declined rapidly and products became highly standardised, competition gradually shifted from product differentiation to manufacturing efficiency.

The cyclical nature of the memory industry stems from a structural mismatch: demand can change rapidly within a single quarter, while supply adjustments require years of planning and billions of dollars in capital investment.

Building a leading-edge DRAM or NAND fab requires substantial upfront investment. Once capacity is installed, producers tend to continue operating to avoid idle capacity, often leading to oversupply and sharp price declines.

This structural pressure has repeatedly driven industry consolidation. During the early 1990s PC supercycle, nearly 20 meaningful DRAM players competed globally. Each subsequent downturn acted as a capital and technology filter, eliminating weaker players.

Companies unable to migrate to next-generation process nodes quickly fell behind in cost competitiveness and were forced out through bankruptcy, acquisition, or exit. Even surviving companies were not immune — SK Hynix, for example, came close to bankruptcy multiple times.

After decades of consolidation, the DRAM industry has evolved into a three-player oligopoly: Samsung Electronics, SK Hynix, and Micron.

HBM: The structural driver of a new supercycle

HBM is the core product driving the current memory supercycle. It is a form of DRAM where multiple dies are vertically stacked and interconnected through thousands of microscopic copper pillars known as Through-Silicon Vias (TSVs).

This architecture significantly increases memory bandwidth, the speed at which data is transferred between memory and processor, while improving power efficiency compared to traditional DDR DRAM.

Figure 1: The architecture of HBM

Source: Techovedas and iFAST Compilation.

Large language models and other AI workloads are often constrained by memory bandwidth rather than pure compute capacity. While training requires substantial computing power, overall system performance is frequently limited by how quickly data can be delivered to processing cores. This constraint is even more pronounced during inference.

HBM is designed to address this bottleneck. Enabling high-speed data transfer allows accelerators to operate close to full utilization, preventing expensive compute resources from sitting idle.

As a result, HBM has become a core component in nearly all high-end AI accelerators, including NVIDIA’s H100, H200, next-generation Rubin platform, and Google TPUs.

HBM4: A step-change in technology

HBM4 entered mass production in early 2026, representing a major advancement in both performance and manufacturing complexity. There are 2 important changes:

1.   Upgrade of the base die

One of the most critical technological advancements in HBM4 lies in the comprehensive upgrade of the base die.

In HBM3 and earlier generations, the base die was fabricated using traditional DRAM processes and served relatively limited functions, primarily handling power distribution, signal buffering, and basic control. As a result, its overall complexity remained low.

With the transition to HBM4, the base die is now manufactured using advanced logic process nodes, enabling the integration of more complex circuitry as well as certain customisation features.

This upgrade not only significantly increases the complexity of the HBM stack but also enhances its customisation capabilities, allowing memory to evolve toward a system-level component.

More importantly, this shift fundamentally changes the relationship between memory suppliers and advanced logic foundries, from conventional collaboration to a highly strategic dependency.

Under this new architecture, TSMC has emerged as a critical enabler within the HBM4 ecosystem.

Table 1: HBM4 base die foundry strategy comparison

Company	Base Die Process Strategy	Cooperation with TSMC	Future Development Direction
SK Hynix	Primarily uses TSMC 12nm (N12) process	Highly dependent on TSMC for base die production	Custom versions may migrate to more advanced nodes
Micron	Both standard and customised HBM4 / HBM4E use TSMC processes	Fully partnered with TSMC	Continued deep collaboration to maintain advanced-node advantage
Samsung Electronics	Primarily uses in-house 4nm process for base die	Partial reliance on TSMC (for advanced packaging compatibility)	HBM4E may migrate to more advanced nodes, with potential for increased external collaboration

At the same time, TSMC is developing customised C-HBM4E solutions using advanced nodes (e.g., 3nm), targeting significantly improved energy efficiency and reduced operating voltage.

Table 2: HBM Architecture Evolution Comparison

Category	HBM3E and earlier	HBM4
Base Die Process	Traditional DRAM process	Advanced logic process
Core Functions	Basic power and signal control	Integrated memory controller, power management, and customized logic
Representative Process Nodes	DRAM-specific process	TSMC N12 / N5 / N3P; Samsung 4nm, etc.
Supplier Role	Fully handled by memory manufacturers	Highly dependent on logic foundries (e.g., TSMC)
Customization Capability	Limited	Significantly enhanced (optimized for AI chips)

2.      Bandwidth becomes the core differentiation

As AI applications continue to scale rapidly, hyperscalers and AI chip designers are placing significantly higher demands on chip performance, and they are willing to pay a premium for extreme bandwidth.

Historically, memory specifications were largely defined by industry standards bodies such as JEDEC, resulting in relatively uniform products across the market. However, when NVIDIA observed that most GPUs were equipped with HBM of similar performance, CEO Jensen Huang personally pushed for a supply chain upgrade. He made multiple trips to Korea to engage closely with key suppliers, even joining engineering teams in informal settings, over beer and fried chicken, to urge for higher-bandwidth solutions to support next-generation AI workloads. AMD CEO Lisa Su subsequently followed with similar high-performance requirements, further accelerating the pace of technological iteration across the ecosystem.

This development reflects a critical structural shift: control over memory specifications is shifting from industry standards to customer-driven design.

As AI chip designers continue to intensify the compute arms race, their demand for higher bandwidth and greater capacity continues to rise, alongside a growing willingness to pay for performance advantages. This not only raises the technological barriers of HBM but also strengthens suppliers’ pricing power, enabling the memory industry to gradually move away from traditional commoditization toward a higher-margin, differentiated competitive landscape.

Table 3: JEDEC standard vs. customer-driven specifications

Category	JEDEC HBM4 Official Standard	NVIDIA / AMD Actual Requirements	Notes
Per-Pin Data Rate	Up to 8 Gb/s	~10–13+ Gb/s	Data transfer rate per signal channel
Interface Width	2048-bit	2048-bit (unchanged, but paired with higher speed)	Number of data channels between memory and processor
Total Bandwidth per Stack	Up to 2 TB/s	~2.4–3.3+ TB/s (some exceeding 3 TB/s)	Specifications increasingly driven by major customers
Specification Control	Industry standard (JEDEC)	Customer-driven (co-design / customization)	Shift from general-purpose to AI-specific design
Primary Applications	Standardized and compatible products	Next-generation AI GPUs (e.g., Rubin, MI450)	Transition from commodity to performance-oriented solutions

Dual supply tightness: A rare market structure

Unlike traditional DRAM, HBM no longer exhibits commodity-like characteristics.

Its manufacturing process is significantly more complex and capital-intensive, involving TSV formation, wafer thinning, multi-layer stacking, and deep integration with advanced packaging technologies such as TSMC’s CoWoS.

At the same time, HBM presents a more challenging yield structure. In stacked configurations such as 8-layer or 12-layer designs, a defect in any single die can compromise the entire package, resulting in amplified yield loss.

As a result, the effective bit output per wafer is significantly lower than that of conventional DRAM. For example, a wafer used for HBM3E (12-layer stacking) delivers only a fraction of the effective output compared to traditional DRAM. As the industry transitions to HBM4, this efficiency gap is expected to widen further.

This ultimately gives rise to a rare market structure in which both high-end memory and conventional memory experience supply tightness simultaneously.

As AI data center demand continues to surge, HBM production is consuming an increasing share of wafer capacity, effectively constraining the supply of traditional DRAM.

At the same time, conventional DRAM and NAND remain large and indispensable markets, with broad applications across PCs, smartphones, automotive, and enterprise storage—segments where HBM is not a substitute.

In other words, these markets are not disappearing; they are being supply-constrained.

As industry capacity increasingly shifts toward HBM, the traditional memory market is, paradoxically, benefiting from tighter supply conditions, with pricing momentum beginning to broaden across the entire memory sector.

These markets are not shrinking — they are being supply-constrained.

Figure 2: AI share of DRAM capacity

Three major players: Differentiated positioning

The three-player memory oligopoly offers distinct risk–return profiles.

Table 4: Competitive comparison

Metric	SK Hynix (000660.KS)	Samsung Electronics (005930.KS)	Micron (MU)
Revenue (2025)	KRW 97.1T	KRW 333.6T	USD 37.4B
Revenue (2026E)	KRW 239.4T (+139%)	KRW 516.9T (+54.9%)	USD 100.5B (+168%)
Net Profit (2025)	KRW 34.1T	KRW 38.9T	USD 8.5B
Net Margin (2025)	35.1%	11.7%	23.3%
Forward 12 Month P/E	5.6x	7.9x	5.2x
HBM Market Share	~57–62%	~20–22%	~18–21%
DRAM Market Share	~35%	~34%	~25%
Key Strength	HBM leadership + strong NVIDIA relationship	IDM integration + foundry optionality	U.S. manufacturing + CHIPS Act support
Key Risk	~20% revenue exposure to China	Foundry yield lag vs. TSMC	HBM4 qualification timeline risk

Source: Company Report, Bloomberg and iFAST Compilations.

Data as of 19 March 2026.

• SK Hynix: The purest AI memory play

SK Hynix is currently the most direct beneficiary of AI-driven memory demand. With an estimated 57–62% global market share in HBM, the company has established itself as a key supplier to major chip designers, including NVIDIA, Google, and Microsoft. Its first-mover advantage in HBM3E has extended order visibility to at least 2026, driving a significant improvement in profitability. Despite these strong fundamentals, SK Hynix continues to trade at an attractive valuation of around 5x 2026 forward earnings, positioning it as one of the more undervalued large-cap semiconductor names.

• Samsung Electronics: Potential transition from memory supplier to AI platform

Samsung operates across a broad business spectrum, including foundry, memory design and manufacturing, and advanced packaging. Its integrated device manufacturer (IDM) model — spanning memory, logic foundry, and end-device businesses — provides a unique capability to develop customized AI chips integrating HBM, a level of vertical integration unmatched by peers. The key catalyst lies in the improvement of its foundry business. Should execution improve, Samsung has the potential to transition from a cyclical memory supplier into an AI infrastructure platform, which could drive a meaningful valuation re-rating.

• Micron: The most direct US-listed AI memory exposure

Micron represents the most liquid AI memory exposure within the U.S. equity market. Approximately 60–70% of its revenue is derived from U.S. hyperscale customers, and its strong domestic manufacturing footprint positions it to directly benefit from CHIPS Act subsidies and the localization trend of AI supply chains. The company plans to invest approximately USD 20 billion in capital expenditure in FY2026 to expand U.S.-based memory capacity, with meaningful production contributions expected from 2027 onwards.

Supply Side: More Disciplined Capacity Expansion

Memory manufacturers are adopting a more disciplined approach to capacity expansion in 2026. Against the backdrop of strong AI-driven demand, suppliers are no longer repeating the aggressive expansion strategies seen in previous cycles. Instead, they are prioritizing capital allocation toward high-margin HBM products and advanced node migration, while deliberately maintaining tight supply conditions to support pricing and profitability.

Table 5: Capacity expansion and investment strategy of major players

Company	Key Investment Projects	2026 Capacity / Shipment Plan	Strategic Focus	Core Logic
SK Hynix	Yongin cluster, Cheongju M15X fab	HBM shipments +70–90%	Focus on HBM expansion, restrained DRAM growth	Prioritise high margins and supply tightness
Samsung Electronics	Pyeongtaek P4, 1c / 1d node migration	HBM capacity +~50%	Advance node migration while maintaining discipline	Avoid supply-demand imbalance
Micron	Boise fab, New York Clay fab (planned)	~USD 20bn CapEx	Focus on AI memory under CHIPS Act support	Strengthen the domestic supply chain and long-term capacity

Source: Company reports, iFAST compilation.

Overall, memory supply (in bit terms) is expected to grow by approximately 15–21% in 2026 and 15–19% in 2027. Importantly, this growth is primarily driven by process node migration rather than large-scale new fab construction. Even when incorporating incremental supply from new entrants such as CXMT, the additional capacity is expected to be largely absorbed by AI-driven demand.

The industry has clearly internalised lessons from past cycles, avoiding the overexpansion that historically led to sharp price corrections.

Capacity is increasingly being reallocated toward HBM and advanced nodes, while expansion of conventional memory is being deferred. The result is a structural reallocation of capacity: HBM absorbs a growing share of wafer resources, while supply of traditional DRAM (e.g., DDR4 and DDR5) tightens. Lead times are extending, and non-AI markets such as PCs and smartphones are facing rising cost pressures.

It is expected that the supply-demand imbalance in memory is likely to persist at least through 2028.

Table 6: Memory supply shortage expected to persist at least until 2028 due to disciplined capacity expansion

Year	DRAM Bit Supply Growth (YoY)	HBM Demand Growth (YoY)	Overall Supply-Demand Gap
2026	15–20%	70–77%	Persistent shortage; HBM fully sold out; traditional DRAM supply squeezed and prices surge sharply
2027	15–19%	50–60%	Tightness continues into H2; new fabs (P5, M15X) start meaningful contribution
2028	12–18% (new fab ramp-up)	30–40%	Earliest possible easing, but likely remains tight

Source: Company reports, iFAST compilation.

This implies that AI is not only creating incremental demand but also reshaping the supply side — fundamentally altering pricing dynamics across the memory industry.

Competitive landscape: HBM4 remains an evolving game

The competitive landscape for HBM4 remains highly dynamic. As NVIDIA’s Vera Rubin platform advances toward commercialization, supplier qualification timelines and capacity allocation continue to evolve, making it premature to identify a clear long-term winner.

Table 7: HBM4 supply landscape

Company	Positioning	Current Progress	Market Expectation
SK Hynix	Leader	Extending HBM3E advantage, deep NVIDIA collaboration	~60–70% initial share
Samsung Electronics	Challenger	Improved HBM4 qualification, accelerating commercialization	~30% allocation
Micron	Fast follower	Mass production of 36GB HBM4, faster-than-expected progress	Not a primary supplier, but strategically important

Source: Company reports, iFAST compilation.

SK Hynix remains NVIDIA’s primary partner, but the transition to HBM4 has narrowed the competitive gap. Samsung has made tangible progress in both qualification and ramp-up, while Micron’s execution has exceeded market expectations.

This suggests that HBM is not a winner-takes-all market, but rather a long-term technology race. As the industry moves toward HBM4E and HBM5, leadership is likely to rotate across generations.

Risks

Despite a strong structural outlook, several risks remain.

First, there is the risk of a cyclical reversal. As new capacity comes online in 2027–2028, any slowdown in AI demand could push the market back into oversupply, resulting in pricing pressure.

Second, geopolitical risks remain particularly relevant for Korean players. Given the importance of the Chinese market to both SK Hynix and Samsung Electronics, any changes in export controls or policy could introduce meaningful uncertainty.

Third, execution risk in HBM4 should not be underestimated. Compared to prior generations, HBM4 involves significantly higher complexity in both manufacturing and advanced packaging. Any delays in yield ramp-up could impact shipment timelines and profitability.

Beyond these, investors should also consider a structural factor — the “Korea Discount.”

Both Samsung Electronics and SK Hynix continue to trade at relatively low valuation multiples, reflecting structural concerns such as:

• Complex ownership structures and family control
• Historically conservative shareholder returns policies
• Corporate governance transparency and minority shareholder protection

These factors led investors to apply a valuation discount to reflect governance-related risks.

While recent initiatives — including Korea’s “Corporate Value-Up” reforms and large-scale share buybacks by both companies — have improved market sentiment, valuation re-rating remains gradual rather than structural.

Investment Implications

This AI-driven memory cycle differs structurally from previous cycles:

• A rare dual supply tightness, as HBM expansion crowds out traditional DRAM supply
• Supply constraints driven by capital intensity and technological barriers
• Improved supply discipline across major players
• Sustained AI demand growth, with each new generation (Rubin, MI400, TPU) requiring higher bandwidth and capacity

However, competition remains fluid, particularly across HBM4, HBM4E, and future generations, where leadership may continue to rotate.

Hence, we believe investors should focus on the memory sector, rather than attempting to pick individual winners.

A diversified approach allows exposure not only to memory leaders, but also to key supply chain players such as TSMC, which plays a critical role in advanced packaging and AI infrastructure.

We view the Global X Asia Semiconductor ETF (HKEX: 3119) as an attractive vehicle for capturing this opportunity. While the ETF does not include Micron, its key advantages include:

• Tracking the FactSet Asia Semiconductor Index, covering the broader Asian semiconductor value chain
• Significant exposure to memory and foundry leaders, with top holdings including SK Hynix, Samsung Electronics, and TSMC (combined >40%)
• Valuation currently below historical average (approximately -1 standard deviation), offering a margin of safety and long-term upside

Figure 3:  FactSet Asia Semiconductor Index forward PE

This positioning allows investors to benefit from both AI-driven demand growth and structural supply reallocation, while diversifying single-company risks. Given our view that the supercycle remains in its early stages, 3119 provides an efficient mean to gain broad exposure to Asia’s semiconductor ecosystem, suitable for long-term allocation.

We estimate the index could reach HKD1,027 by 2028, implying approximately 82% upside from 19 March 2026 levels.

Table 8: FactSet Asia Semiconductor Index Forecast

Metric	2025	2026E	2027E	2028E
EPS	19.2	40.3	47.3	53.5
Earnings Growth	—	+109.6%	+17.6%	+13.0%
Implied Valuation (HKD)	—	—	—	1,017
Potential Upside (19x PE)	—	—	—	82%

Source: Bloomberg, iFAST compilation

Data as of 19 March 2026

Declaration:

For specific disclosure, at the time of publication of this report, the analyst who produced this report and IFPL (via its connected and associated entities) holds a NIL position in the abovementioned securities.