TSMC 2Q26 results tell you why we are so bullish on Asian semiconductors

Another Beat — and a High-Quality One

Despite the recent volatility in Asian semiconductor stocks, we always remain bullish on the industry’s prospects — and TSMC’s latest results show exactly why. In Q2 2026, revenue reached USD 40.2 billion, up 12.0% QoQ and at the top end of guidance. Wafer shipments and average selling price (ASP) both grew by double digits YoY, reflecting strong demand for advanced nodes and underscoring the company’s pricing power.

Beyond revenue, profitability was even more impressive. Gross margin reached 67.7%, above guidance, while operating margin, net income and EPS all came in well ahead of market expectations. Although this quarter’s EPS included a one-off gain from the May disposal of Vanguard International Semiconductor (VIS) shares, EPS excluding that gain was still about USD3.96 per ADR — core profitability remains firmly strong.

The beat came with a raise. Third-quarter revenue guidance of USD44.6–45.8 billion implies roughly 12% QoQ and 37% YoY growth at the midpoint. Gross margin and operating margin are guided at 65–67% and 56–58% respectively — below the second quarter’s actual levels, mainly because the new N2 node is ramping faster than expected and early-stage production costs will dilute second-half gross margin. This pressure, however, is a normal transition in any new-node ramp; it remains well under control and is not a signal of weakening demand.

More importantly, management raised full-year 2026 revenue growth guidance from “more than 30%” to “slightly above 40%”. TSMC has always been conservative in setting growth guidance; a roughly ten-percentage-point upgrade at mid-year is not fine-tuning — it is a vote of confidence in the demand outlook.

Table 1: 2Q26 results and updated guidance

Metric	2Q26 actual	Guidance / Consensus	Change
Revenue (USD billion)	40.2	39.0–40.2 (company guidance)	+33.7% YoY / +12.0% QoQ
Gross margin	67.7%	65.5%–67.5% (company guidance)	+9.1 ppt YoY
Operating margin	60.3%	56.5%–58.5% (company guidance)	+10.7 ppt YoY
Net income (USD billion)	22.4	~19.7 (consensus)	+77.4% YoY (in NT$)
EPS per ADR (USD)	4.31	3.80–3.83 (consensus)	+77.4% YoY
FY2026 revenue growth guidance	Slightly above 40%	Previously “more than 30%”	Raised at mid-year
Source: TSMC and iFAST Compilation. Data as of 16 July 2026.

CapEx: The Strongest Rebuttal to the “Peak AI” Thesis

TSMC’s capital expenditure is a key leading indicator of AI hardware demand. Management is known for its prudence, yet the company has now raised its CapEx budget for the second time this year, and actual quarterly spending keeps climbing — implying the pace of investment will accelerate further in the second half.

Management attributed the budget increase to two factors: continued growth in customer demand, and rising equipment prices. Even as equipment suppliers raise prices, TSMC is willing to absorb the higher costs to secure capacity — a reflection of its confidence in future demand.

CFO Wendell Huang went further: “Last time, we said our CapEx in the next three years will be significantly higher than the CapEx in the past three years. Now the CapEx in the next three years will be even more significantly higher than the past three years.” For a company whose management has always chosen its words conservatively, such an escalation is rare — a clear indication that TSMC believes the AI investment wave is far from its peak, and a direct rebuttal to market worries that AI demand is about to top out.

Table 2: TSMC’s 2026 CapEx — full-year budget raised twice, quarterly spending accelerating

	Full-year 2026 CapEx budget	Actual CapEx in the quarter
January (4Q25 earnings call)	USD52–56 billion	—
April (1Q26 earnings call)	~USD56 billion	1Q26: USD11.1 billion
July (2Q26 earnings call)	USD60–64 billion	2Q26: USD15.7 billion
Implied per quarter in 2H26	—	~USD16.6–18.6 billion
Note: CapEx totalled USD26.8 billion in 1H26; the raised full-year budget leaves USD33.2–37.2 billion for 2H26, i.e. roughly USD16.6–18.6 billion per quarter — above 2Q26’s record level. Source: TSMC and iFAST Compilation. Data as of 16 July 16 2026.

The Build-Out Keeps Accelerating

TSMC is not just raising its budget — its construction pace proves the expansion is real. Between 2017 and 2020, the company built an average of about three facilities a year. During the 2021–2024 COVID supercycle, the pace rose to about five a year. In 2025, it pushed ahead with nine facilities in a single year — eight wafer fabs plus one CoWoS advanced-packaging plant.

And the expansion is not stopping there. On the earnings call, CEO C.C. Wei disclosed that TSMC will build 13 leading-edge process and advanced-packaging facilities in Taiwan over the next several years. The company is also investing an additional USD100 billion in Arizona, adding at least four more wafer fabs and extending the site’s scope to 2nm-and-below logic and advanced packaging.

The 13 facilities represent a multi-year construction plan and are not directly comparable with the annual build rates of the past, but the sheer scale still shows how different this AI cycle is from previous ones. Even during the pandemic — the most severe chip shortage in a decade — TSMC’s build pace only rose from about three facilities a year to five. Today, the expansion is clearly moving much faster.

TSMC has always prized capital discipline. As one of the most capital-disciplined companies in the market, it too believes AI hardware demand is far from peaking. As Wei put it: “It’s a big money, so we do it carefully.” The core reason management is willing to commit to long-term investments on this scale is that the demand-supply gap remains “very big”.

More importantly, demand visibility now extends to the end of the decade. “From this day on all the way to probably 2029, 2030, the demand is very strong… we are witnessing a kind of a new industry, called AI industry,” Wei said. Asked whether demand for 3nm-and-below exceeds supply by 30–50%, he declined to give a specific number — but stressed once again that the gap is very large.

Nor is TSMC’s judgement based on customer orders alone. To address market concerns that AI chips might be accumulating somewhere in the supply chain, the company is checking data centers’ construction progress, locations and rack installations one by one, to confirm that its chips end up doing real computing rather than flowing into inventory. Working backwards from end deployment to verify true demand adds further credibility to the expansion decision.

It is also worth noting that even as TSMC accelerates its overseas footprint, core R&D and the most advanced nodes remain centred in Taiwan — consistent with our view in 

Related article: Taiwan Outlook 2H26: Taiwan’s irreplaceable AI supply chain and why the re-rating is not over

Table 3: TSMC keeps accelerating its fab construction

	Construction pace / scale	Context
2017–2020	~3 per year	Pre-pandemic normal
2021–2024	~5 per year	COVID supercycle
2025	9 in the year	8 wafer fabs + 1 CoWoS packaging plant
From 2026 onwards	13 in Taiwan + at least 4 in Arizona	Cumulative Arizona investment of USD265 billion
Note: figures for 2017–2025 are approximate numbers of new facilities started each year; “From 2026 onwards” refers to the cumulative number of facilities planned or under construction over the coming years. Source: TSMC and iFAST Compilation. Data as of 16 July 2026.

Not Just TSMC: The Whole Supply Chain Is Casting a Vote of Confidence

A single company raising CapEx could simply be management over-optimism. But when companies across different tiers of the supply chain expand investment almost simultaneously, it becomes very hard to believe that AI hardware demand is about to peak.

• Upstream in equipment：ASML — the world’s sole supplier of EUV lithography systems — reported second-quarter revenue of €9.33 billion, exceeding its guidance. The company also raised its full-year 2026 revenue outlook for the second time this year, from €36–40 billion to €43–45 billion. More importantly, ASML said its EUV capacity for 2027 is nearly fully booked. It plans to increase capacity by 30% in 2027 and is exploring a further 30% expansion in 2028. With each EUV system costing more than US$200 million and requiring orders 18–30 months in advance, customers would only make such substantial long-term commitments if they had sufficient confidence in the outlook for AI semiconductor demand.
• The same signal is coming from the Asian supply chain： Within roughly one week in July, Taiwanese memory maker Nanya Technology announced that its 2027 CapEx will rise to four times the original plan, while ABF substrate and PCB maker Unimicron raised about USD1.4 billion — stating explicitly that the funds will be used to purchase raw materials for existing AI orders, meaning demand is growing faster than internal cash flow can support. This proves demand is not concentrated in TSMC alone; it is spreading across the entire semiconductor supply chain.
• Downstream demand is just as strong： Despite market talk that Meta may lease out part of its data-center capacity, this does not signal an AI demand peak. In the first half of 2026 alone, Meta contracted more than 5GW of cloud and colocation data-center capacity — before counting its own accelerating self-build projects. Meta is currently constructing five gigawatt-class “Titan” campuses simultaneously. Its 2027 CapEx is expected to stay elevated, and the company is on track to command more AI compute than OpenAI or Anthropic by the end of this year. Since Meta’s in-house MTIA accelerators are built on TSMC’s N3-class nodes, these data-center investments should ultimately translate upstream along the supply chain into wafer orders.

Bottlenecks Keep Spreading: The AI Ecosystem Through TSMC’s Results

Eighteen months ago, the main bottleneck in AI hardware was GPUs. Supply pressure has since spread along the chain to CPUs, HBM and advanced packaging — and today, almost every link in the chain is starting to run short.

Speaking about agentic AI, Wei noted that CPUs are regaining importance in AI data centers: “no matter what CPU approach is taken, whether it’s x86, ARM-based, or RISC-V architecture, they are almost all TSMC’s customers.” On advanced packaging, he was equally candid: “our packaging capacity is so tight that now it limits my customers’ growth.”

More strikingly, Wei then volunteered another new bottleneck: “As time goes by, some of the customers’ products need more testers. You cannot believe that… the tester in shortage, so we have to put more CapEx into the testers.” Testing — a segment rarely regarded as an AI supply bottleneck — is now running short as well, showing that AI demand is spreading into ever wider parts of the industry chain.

Every time the bottleneck moves, a new part of Taiwan’s supply chain stands to benefit. TSMC’s backend overflow can be absorbed by packaging-and-testing partners such as ASE; tightening test capacity could benefit dedicated test houses such as King Yuan Electronics. The demand is even spilling over into mature nodes: Wei specifically pointed out that because every AI data center needs large volumes of power-management and environmental-sensing components, power management ICs and sensors are among the few mature-node products in genuine shortage.

Pricing Restraint: TSMC Has Yet to Unlock Its Full Potential

We argued in our previous update on Taiwan equity market that TSMC has been remarkably restrained in its pricing, choosing not to exploit its near-monopoly position in advanced nodes to charge customers premium prices.

Related article: Taiwan Outlook 2H26: Taiwan’s irreplaceable AI supply chain and why the re-rating is not over

Asked about this, CEO C.C. Wei explained the company’s thinking clearly: “We don’t suddenly increase our price by which I like to have 4x or 5x… our customer has to be successful. I don’t want to squeeze them out of the market… we earn our value, and we make sure that our gross margin is enough for our long-term sustaining expansion.”

This confirms precisely the view we laid out before: TSMC deliberately avoids sharp price increases, preferring to give up some short-term gains and adjust prices gradually so that its customers — and the whole industry ecosystem — can keep developing, in exchange for more durable growth. And the record shows that pricing restraint does not mean giving up profitability: blended wafer ASP is up 13% YoY this year, and gross margin has hit a record high, reflecting the balance TSMC has struck between keeping customers competitive and capturing its own value.

The Technology Roadmap: What Do the Forward-Looking Details Signal for Investors?

This earnings call not only showed that technologies such as N2 and COUPE are commercialising at a faster pace, but also extended TSMC’s technology visibility into the 2030s. For investors, what matters is not just the specifications, but when these advances translate into capacity demand, revenue and supply-chain opportunities.

• N2 is ramping — and expanding — faster than originally planned

The 2-nanometer node accounted for 3% of wafer revenue in its very first quarter of volume production. Because the ramp is running ahead of expectations, management now estimates that N2 will dilute second-half 2026 gross margin by 3–4 percentage points — more than forecast in April, and the main reason the third-quarter margin guidance steps down. But it also means the associated revenue will be realised earlier than originally scheduled. AMD is among the first major customers: its Venice server CPUs built on TSMC’s 2nm process, along with the Instinct MI450 and MI455 AI accelerators positioned against NVIDIA’s Rubin, are reportedly set to debut at the end of July.

N2 capacity plans also keep being revised upward. Asked whether the roughly 70% compound annual growth rate for N2-family capacity over 2026–2028 still stands, Wei hinted that TSMC is accelerating its advanced-node expansion even further.

• COUPE has moved from roadmap to production

TSMC’s co-packaged optics platform COUPE has started production and is gradually ramping output. Silicon photonics is no longer a distant concept; it is moving into the commercialisation and revenue-contribution stage.

As the compute scale of AI racks keeps growing, the limits of traditional electrical interconnects — in speed, power consumption and transmission distance — are becoming increasingly apparent, and part of the data traffic may need to shift from electrical to optical signals. COUPE moving into volume production means optical interconnects are set to become a key building block of the next phase of AI infrastructure, bringing a new growth driver to the silicon-photonics and advanced-packaging supply chain.

• The A14 family extends technology visibility to 2030

A14 remains on schedule for risk production in 2027 and volume production in 2028. TSMC is also building a fuller process family around A14 to broaden its applications and extend the platform’s life cycle.

A13, first unveiled at the April technology symposium, is slated for volume production in 2029; it uses a 97% optical shrink to save more than 6% of die area, with design rules backward-compatible with A14. A12 will introduce backside power delivery, also targeting volume production in 2029. As Wei put it: “A14 will be an even larger and longer-lasting node for TSMC than N2, just like 2-nanometer is a larger and longer-lasting node than 3-nanometer.”

This also reflects a broader industry trend. As transistor scaling approaches its physical limits, each generation of advanced process demands greater technical difficulty, higher development costs and larger capital commitments, with development cycles lengthening accordingly. To amortise the investment and improve returns, each new process platform needs to cover more products and serve customers for longer.

• The glass-substrate transition is happening, but revenue will have to wait

On next-generation advanced-packaging substrates, Wei confirmed that CoWoS — the silicon interposer — remains mainstream today, while TSMC is developing a lower-cost alternative and working with substrate suppliers. The technology is expected to complete qualification around the second half of 2027 at the earliest, and only after that will it move into production together with customers. The direction of the glass-substrate transition is becoming clear, but the supply chain is unlikely to see meaningful revenue before 2028.

Intel’s EMIB-T Is a Challenger Worth Our Atttention

Google’s next-generation TPU is expected to adopt Intel’s EMIB-T advanced packaging, posing a potential challenge to CoWoS’s dominance in the high-end packaging market. Management’s response, however, was strikingly relaxed: “Our packaging capacity is so tight that now it limits my customers’ growth. So, we welcome that additional flexibility… that will help TSMC’s frontend wafer business growth.”

Management’s logic is that even if some customers adopt EMIB-T, as long as the frontend wafers are still made by TSMC, additional packaging capacity from other suppliers actually helps unlock wafer demand. At this stage, EMIB-T looks more like a second source amid CoWoS shortages — a reflection of capacity overflow rather than customers actively shifting orders at scale.

That said, we still see EMIB-T as a potential threat to TSMC’s advanced-packaging business. The real risk is not near-term share loss, but that a maturing second source gradually widens customers’ options and bargaining power. Developments after 2027 will be more decisive; investors should watch EMIB-T’s production scale, yields on large packages, the actual outcome of the Google TPU program, and whether other hyperscalers follow suit.

Investment Implications | The Road to AGI: 67% Upside Potential

TSMC’s latest results make one thing clear: AI capital spending shows no meaningful sign of slowing, let alone peaking. From Taiwan’s foundry, packaging and testing cluster to Korea’s memory industry, the whole region stands to benefit in tandem. We therefore remain bullish on Asian semiconductors, and we read the recent market volatility as driven by sentiment and de-leveraging rather than any change in fundamentals.

In a recent essay, Google DeepMind CEO Demis Hassabis captured the meaning of the current AI build-out in a single line. We do not necessarily agree with every point he makes, but one sentence is hard to forget: “If you stop to think about it, we’ve essentially found a way to make sand think. It’s miraculous.”

What is undeniable is that frontier models are iterating at unprecedented speed, with new models such as Grok, Meta’s Muse, Kimi and Qwen arriving in quick succession. Ever-improving model capability keeps pushing compute demand higher, translating upstream along the supply chain into more orders for chips and related equipment. The road ahead will not be smooth, and market volatility is unavoidable. But making “sand think” will always depend on advanced semiconductors — and TSMC holds the most critical link.

Table 4: TSMC earnings forecasts and potential upside

TSM ADR	2025A	2026E	2027E	2028E
PE Ratio	36.6	24.4	19.0	15.6
Expected Earnings Growth		50.2%	28.2%	22.3%
EPS (USD)	10.7	16.1	20.6	25.2
Target price (USD)				655
Upside Potential (based on a fair PE ratio of 26x)				67%
Source: Bloomberg and iFAST Compilation. Data as of 17 July 2026.

Table 5: Product Recommendations

Market/ Sector	Fund	ETF
Taiwan	LionGlobal Taiwan Fund	Franklin FTSE Taiwan ETF (NYSE:FLTW)
Asia Semiconductor	/	Global X Asia Semiconductor ETF (HKEX:3119)